The present invention relates generally to integrated circuits and more particularly to biasing a crystal oscillator.
Crystal oscillators are ubiquitous in modern electronics. Many electronic devices that have a clock, transmit or receive information, or have other synchronous logic, include a crystal oscillator.
Crystal oscillators have employed a large feedback resistor, coupled across the crystal terminals, to bias the amplifier. The resistor forces the common-mode voltage of the input to the amplifier and the common-mode voltage of the output from the amplifier to be equal. The resistor is often implemented off-chip. Such off-chip components increase the cost of the oscillator. An alternative to an off-chip resistor is to use an on-chip polysilicon resistor. However, to fabricate a polysilicon resistor with a large magnitude of resistance requires a large die area.
Another alternative to the off-chip resistor is to use a metal oxide semiconductor (MOS) transistor with a large channel length, or multiple MOS transistors in series, biased to operate in the linear region. However, the MOS implementation of resistance has large variation with process, voltage and temperature (PVT). The MOS implementation also introduces a large leakage current in the integrated circuit that results in a common-mode voltage difference between the amplifier input and the amplifier output that prevents shaping circuitry from operating properly and results in a distorted output clock duty cycle. Thus, it would be advantageous to have a crystal oscillator circuit that does not require an off-chip resistor yet addresses the above-mentioned limitations.